DocumentCode :
2896872
Title :
ES3: Future system and memory architectures: Transformations by technology and applications
Author :
Lu, Ning ; Chang, Ly-Yu ; Takashima, D.
Author_Institution :
Etron Technol., Hsinchu, Taiwan
fYear :
2011
fDate :
20-24 Feb. 2011
Firstpage :
530
Lastpage :
530
Abstract :
The emergence of new enabling technologies and applications paradigms will likely drive radical changes in the memory architecture of future systems. With multi-core CPU dies sporting embedded DRAM caches, ever-improving NAND flash storage densities for SSD and SCM, and 3D-integration technologies to bring everything together into a single package, possibilities abound for system enhancements throughout the memory hierarchy. At the same time, applications needs are rapidly evolving as the world shifts from a product-centric economy to a service- and experience-oriented economy focused on hardware such as smartphones, set-top boxes, and 3D digital TV. This evening session will discuss future system and memory architectures from perspectives spanning the 3 C´s: computing, consumer electronics, and communications - considering both what new technology might offer and what new applications might need.
Keywords :
DRAM chips; NAND circuits; flash memories; integrated memory circuits; multiprocessing systems; 3D digital TV; 3D-integration technologies; DRAM caches; ES3; NAND flash storage; SCM; SSD; consumer electronics; experience-oriented economy; memory architectures; multi-core CPU dies; service-oriented economy; set-top boxes; smartphones; system architectures; Memory architecture; Smart phones; Streaming media; System analysis and design; TV; Three dimensional displays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-61284-303-2
Type :
conf
DOI :
10.1109/ISSCC.2011.5746424
Filename :
5746424
Link To Document :
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