DocumentCode :
2896938
Title :
Implementation of a 3GPP LTE turbo decoder accelerator on GPU
Author :
Wu, Michael ; Sun, Yang ; Cavallaro, Joseph R.
Author_Institution :
Electr. & Comput. Eng., Rice Univ., Houston, TX, USA
fYear :
2010
fDate :
6-8 Oct. 2010
Firstpage :
192
Lastpage :
197
Abstract :
This paper presents a 3GPP LTE compliant turbo decoder accelerator on GPU. The challenge of implementing a turbo decoder is finding an efficient mapping of the decoder algorithm on GPU, e.g. finding a good way to parallelize workload across cores and allocate and use fast on-die memory to improve throughput. In our implementation, we increase throughput through 1) distributing the decoding workload for a codeword across multiple cores, 2) decoding multiple codewords simultaneously to increase concurrency and 3) employing memory optimization techniques to reduce memory bandwidth requirements. In addition, we analyze how different MAP algorithm approximations affect both throughput and bit error rate (BER) performance of this decoder.
Keywords :
3G mobile communication; computer graphic equipment; coprocessors; error statistics; maximum likelihood decoding; turbo codes; 3 GPP; GPU; LTE; MAP algorithm; bit error rate; codeword; decoding; memory optimization techniques; turbo decoder accelerator; Bit error rate; Decoding; Graphics processing unit; Instruction sets; Iterative decoding; Kernel; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (SIPS), 2010 IEEE Workshop on
Conference_Location :
San Francisco, CA
ISSN :
1520-6130
Print_ISBN :
978-1-4244-8932-9
Electronic_ISBN :
1520-6130
Type :
conf
DOI :
10.1109/SIPS.2010.5624788
Filename :
5624788
Link To Document :
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