Title :
Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization
Author :
Paulsson, Katarina ; Hübner, Michael ; Becker, Jürgen
Author_Institution :
Univ. Karlsruhe (TH), Karlsruhe
Abstract :
This paper presents the results from research work done in the field of reconfigurable architectures and systems. Dynamic and partial reconfiguration has mainly been investigated as a way to configure functionalities in hardware on-demand, controlled either by the user or by the system itself. This paper presents work that was aimed at applying hardware reconfiguration even for run-time adaptation of functional implementation in order to enable self-optimization of power and performance according to the run-time specific requirements of the application.
Keywords :
clocks; field programmable gate arrays; hardware on-demand; online power/performance optimization; partial hardware reconfiguration; reconfigurable architectures; run-time adaptation; Delay; Energy consumption; Field programmable gate arrays; Frequency estimation; Hardware; Optimization; Power generation; Reconfigurable architectures; Routing; Runtime; Power optimization; Reconfiguration;
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
DOI :
10.1109/FPL.2008.4630044
