Title :
Thermal aware FPGA architectures and CAD
Author_Institution :
Center for Integrated Circuits & Syst., Univ. of Texas at Dallas, Richardson, TX
Abstract :
As a result of our research so far, our placement tool achieved temperature reductions of over 10degC while the adaptive FPGA architectures generate timely responses to bring down temperature by about 14degC. Since routing accounts for a bulk of the power generated, exploiting the temporal and spatial variation in interconnect utilization to minimize their thermal contributions would be an interesting future extension to our work.
Keywords :
CAD; electronic engineering computing; field programmable gate arrays; integrated circuit interconnections; CAD; interconnect utilization; thermal aware FPGA architectures; thermal contributions; Capacitance; Cost function; Design automation; Field programmable gate arrays; Finite difference methods; Frequency; Power generation; Switches; Temperature distribution; Thermal management;
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
DOI :
10.1109/FPL.2008.4630045
