Session 5 overview / analog: PLLs

Summary form only given. Frequency Synthesizers and clock generators are essential building blocks in almost all modern electronic systems. The Phase-locked loop (PLL) is the most suitable circuit architecture to perform the extremely diverse tasks required by the very different applications. In wireless transceivers, PLLs are used to generate high-frequency local oscillator signals with extremely low phase noise for up-conversion and down-conversion of the transmitted and received signals. For high-speed data communications very low-jitter clock signals are required. When used as clock generators for large processors, wide frequency range, fast locking time and very-low-power quiescent dissipation are absolutely mandatory. These tough specifications need to be achieved at the lowest possible power, both for the stringent requirements of portable systems, but also to reduce the issues associated with heat dissipation.