• DocumentCode
    2897497
  • Title

    Detouring: Translating software to circumvent hard faults in simple cores

  • Author

    Meixner, Albert ; Sorin, Daniel J.

  • Author_Institution
    Dept. of Comput. Sci., Duke Univ., Durham, NC
  • fYear
    2008
  • fDate
    24-27 June 2008
  • Firstpage
    80
  • Lastpage
    89
  • Abstract
    CMOS technology trends are leading to an increasing incidence of hard (permanent) faults in processors. These faults may be introduced at fabrication or occur in the field. Whereas high-performance processor cores have enough redundancy to tolerate many of these faults, the simple, low-power cores that are attractive for multicore chips do not. We propose Detouring, a software-based scheme for tolerating hard faults in simple cores. The key idea is to automatically modify software such that its functionality is unchanged but it does not use any of the faulty hardware. Our initial implementation of Detouring tolerates hard faults in several hardware components, including the instruction cache, registers, functional units, and the operand bypass network. Detouring has no hardware cost and no performance overhead for fault-free cores.
  • Keywords
    electronic engineering computing; fault tolerant computing; microprocessor chips; CMOS technology; detouring; detouring methods; fault tolerance; fault-free cores; functional units; high-performance processor cores; instruction cache; multicore chips; operand bypass network; software translation; CMOS process; CMOS technology; Circuit faults; Costs; Degradation; Fabrication; Hardware; Multicore processing; Redundancy; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Dependable Systems and Networks With FTCS and DCC, 2008. DSN 2008. IEEE International Conference on
  • Conference_Location
    Anchorage, AK
  • Print_ISBN
    978-1-4244-2397-2
  • Electronic_ISBN
    978-1-4244-2398-9
  • Type

    conf

  • DOI
    10.1109/DSN.2008.4630073
  • Filename
    4630073