DocumentCode :
2897613
Title :
Statistical Fault Injection
Author :
Ramachandran, Pradeep ; Kudva, Prabhakar ; Kellington, Jeffrey ; Schumann, John ; Sanda, P.
Author_Institution :
IBM Syst. & Technol. Group, Poughkeepsie, NY
fYear :
2008
fDate :
24-27 June 2008
Firstpage :
122
Lastpage :
127
Abstract :
A method for statistical fault injection (SFI) into arbitrary latches within a full system hardware-emulated model is validated against particle-beam-accelerated SER testing for a modern microprocessor. As performed on the IBM POWER6 microprocessor, SFI is capable of distinguishing between error handling states associated with the injected bit flip. Methodologies to perform random and targeted fault injection are presented.
Keywords :
flip-flops; hardware description languages; statistical analysis; arbitrary latches; error handling states; full system hardware-emulated model; injected bit flip; statistical fault injection; Circuit faults; Emulation; Hardware; Latches; Microprocessors; Particle beams; Power system modeling; Resilience; Software design; Software tools; Fault Injection; SER; SFI; Soft Errors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Dependable Systems and Networks With FTCS and DCC, 2008. DSN 2008. IEEE International Conference on
Conference_Location :
Anchorage, AK
Print_ISBN :
978-1-4244-2397-2
Electronic_ISBN :
978-1-4244-2398-9
Type :
conf
DOI :
10.1109/DSN.2008.4630080
Filename :
4630080
Link To Document :
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