DocumentCode :
2897629
Title :
A new parallel implementation for particle filters and its application to adaptive waveform design
Author :
Miao, Lifeng ; Zhang, Jun Jason ; Chakrabarti, Chaitali ; Papandreou-Suppappola, Antonia
Author_Institution :
Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA
fYear :
2010
fDate :
6-8 Oct. 2010
Firstpage :
19
Lastpage :
24
Abstract :
Sequential Monte Carlo particle filters (PFs) are useful for estimating nonlinear non-Gaussian dynamic system parameters. As these algorithms are recursive, their real-time implementation can be computationally complex. In this paper, we analyze the bottlenecks in existing parallel PF algorithms, and we propose a new approach that integrates parallel PFs with independent Metropolis-Hastings (PPF-IMH) algorithms to improve root mean-squared estimation error performance. We implement the new PPF-IMH algorithm on a Xilinx Virtex-5 field programmable gate array (FPGA) platform. For a one-dimensional problem and using 1,000 particles, the PPF-IMH architecture with four processing elements utilizes less than 5% Virtex-5 FPGA resources and takes 5.85 μs for one iteration. The algorithm performance is also demonstrated when designing the waveform for an agile sensing application.
Keywords :
Gaussian processes; Monte Carlo methods; computational complexity; field programmable gate arrays; mean square error methods; parallel algorithms; parameter estimation; particle filtering (numerical methods); Metropolis-Hastings algorithms; Virtex-5 FPGA resources; Xilinx Virtex-5 field programmable gate array platform; adaptive waveform design; agile sensing application; computational complexity; nonlinear nonGaussian dynamic system parameter estimation; parallel PF algorithms; root mean-squared estimation error performance; sequential Monte Carlo particle filters; Adaptation model; Algorithm design and analysis; Computer architecture; Copper; Estimation; Hardware; Sensors; FPGA; Particle filter; independent Metropolis-Hastings algorithm; parallel architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems (SIPS), 2010 IEEE Workshop on
Conference_Location :
San Francisco, CA
ISSN :
1520-6130
Print_ISBN :
978-1-4244-8932-9
Electronic_ISBN :
1520-6130
Type :
conf
DOI :
10.1109/SIPS.2010.5624820
Filename :
5624820
Link To Document :
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