Title :
Two approaches to charge control in saturated logic gates
Author :
Hirsch, Laurence ; Moore, James ; Pollock, Lori ; Kons, J.
Author_Institution :
Westinghouse Electric Corp,. Elkridge, MD, USA
Keywords :
Delay; Diodes; Doping; Gettering; Gold; Logic circuits; Logic gates; Noise figure; Noise reduction; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1966 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1966.1157673
