Implementation of BMLS computer model on hypercube systems

The authors describe a time-efficient implementation of the baseline microwave landing system (BMLS) computer model on 16- and 64-node hypercube processors. First the sequential execution of the model was improved by eliminating the receiver input data file which logically connects the transmitter (BMLST) and receiver (BMLSR) units of the BMLS. The combined code was then mapped onto the nodes of parallel processors (AMETEK S-14/16 and 64) by creating a child program to run the combined BMLST and BMLSR routines in S-14 and a parent program to handle all the I/O and disk operations in the host (VAX 11/750). Parallel decomposition of the 95 percent PFE (path following error) contour generation task was achieved by dividing the search grid points into 16 or 64 groups, each of which was assigned to a particular node of the system S-14. Each processing element executed the same combined code for a different set of gridpoints of an airport scenario. This resulted in 15- and 60-fold speedups for 16- and 64-node implementations