CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples

Author

Voinigescu, S.P. ; Nicolson, S.T. ; Khanpour, M. ; Tang, K.K.W. ; Yau, K.H.K. ; Seyedfathi, N. ; Timonov, A. ; Nachman, A. ; Eleftheriades, G. ; Schvan, P. ; Yang, M.T.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont.

fYear

2007

fDate

27-30 May 2007

Firstpage

1971

Lastpage

1974

Abstract

This paper investigates the suitability of 90nm and 65nm GP and LP CMOS technology for SOC applications in the 60GHz to 100GHz range. Examples of system architectures and transceiver building blocks are provided which emphasize the need for aggressively scaled GP CMOS and low-VT transistors if CMOS is to compete with SiGe BiCMOS above 60 GHz. This requirement is in conflict with the 2005-ITRS proposal to use LP CMOS for RF applications.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; MIMIC; integrated circuit design; system-on-chip; 60 to 100 GHz; 65 micron; 90 micron; BiCMOS technology; MIMIC; SiGe; integrated circuit design; system-on-chip; BiCMOS integrated circuits; CMOS integrated circuits; CMOS technology; Circuit topology; Costs; Frequency; Germanium silicon alloys; Power dissipation; Silicon germanium; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378422

Filename

4253052

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2898463