Title :
A systematic engineering approach to complex arrays
Author :
Vadasz, L. ; Nevala, R. ; Sander, W. ; Seeds, R.
Author_Institution :
Fairchild Semiconductor, Palo Alto, CA, USA
Keywords :
Circuit testing; Design engineering; Integrated circuit interconnections; Logic arrays; Logic design; Logic devices; Logic functions; Reliability engineering; Silicon; Systems engineering and theory;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1966 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1966.1157703
