Title :
Application-specific Instruction-Set Processor design methodology for wireless image transmission systems
Author :
Isshiki, Tsuyoshi ; Hao Xiao ; Hsuan-Chun Liao ; Dongju Li ; Kunieda, Hiroaki
Author_Institution :
Dept. Commun. & Integrated Syst., Tokyo Inst. of Technol., Tokyo, Japan
Abstract :
Application-specific Instruction-Set Processor (ASIP) technology that became available in recent years opens up new possibilities in optimizing the total system in terms of performance and power consumption. Applying ASIP technology to multiprocessor SoC (MPSoC) architectures involves many design issues such as instruction-set extension methodology, interprocessor interconnect and SW development tool chain for ASIP-based MPSoCs. In this paper, we present our recent works on ASIP designs for wireless UWB MAC protocol processor and image signal processors, focusing on the design issues of ASIP developments in these two different applications, and also the integration issues of the two to realize the wireless image transmission systems platform solution.
Keywords :
access protocols; image processing; instruction sets; multiprocessing systems; multiprocessor interconnection networks; personal area networks; system-on-chip; ultra wideband technology; ASIP designs; ASIP technology; MPSoC architectures; SW development tool chain; application-specific instruction-set processor design methodology; image signal processors; instruction-set extension methodology; interprocessor interconnect; multiprocessor SoC architecture; power consumption; wireless UWB MAC protocol processor; wireless image transmission systems platform solution; Computer architecture; Media Access Protocol; Pipelines; Reduced instruction set computing; Streaming media; System-on-a-chip; Wireless communication;
Conference_Titel :
SoC Design Conference (ISOCC), 2012 International
Conference_Location :
Jeju Island
Print_ISBN :
978-1-4673-2989-7
Electronic_ISBN :
978-1-4673-2988-0
DOI :
10.1109/ISOCC.2012.6407098
