Quasi-Static Energy Recovery Logic with Single Power-Clock Supply

This paper presents new quasi-static single-phase energy recovery logic (QSSERL) which, unlike any other existing adiabatic logic family, uses single sinusoidal supply-clock without additional voltages. This not only ensures lower energy dissipation, but also simplifies the clock design which would be otherwise more complicated due to the signal synchronization requirement. It is demonstrated that QSSERL circuits operate as fast as conventional two-phase energy recovery logic counterparts. HSPICE simulation with an 8-bit logarithmic lookahead adder (LLA) using static CMOS, CAL (an existing single-phase based energy recovery logic), and QSSERL shows that the QSSERL adder consumes only 56% of energy as with its static CMOS counterpart at 10MHz and achieves better energy efficiency than CAL.