Fault tolerant smart transducer interfaces for safety-critical avionics applications

Smart transducer interfaces are promising technologies for the next generation safety-critical avionics applications. In this paper we present two fault tolerant smart transducer interface architectures based on the IEEE 1451 standard. FPGA is the hardware platform that has been selected for the development of the proposed architectures. The first interface architecture is a single-chip solution while the second one is dual-chip. Reliability and safety analysis for both architectures is also carried out. A special attention is paid to the description of the single-chip interface implementation using the Spartan-6 LX45T Xilinx FPGA. The resulting prototype is used to validate fault tolerance mechanisms and real-time performance of the single-chip interface.