Title :
Issues with contact defect test structures
Author :
Mitchell, M.A. ; Huang, J. ; Forner, Lino
Author_Institution :
Honeywell Inc., Plymouth, MN, USA
Abstract :
The design of contact defect test structures is described. The results from measurements of polysilicon contact defect test structures on a series of wafer lots are given. The different types of yield models used for yield projections are also described. Even if an open contact does occur in an isolation transistor, for example, it is shown that the isolation integrity remains essentially unchanged
Keywords :
electrical contacts; elemental semiconductors; integrated circuit testing; monolithic integrated circuits; contact defect test structures; isolation integrity; isolation transistor; open contact; polysilicon contact defect; wafer lots; yield models; yield projections; Circuit testing; Conductors; Contact resistance; Electrical resistance measurement; Electromigration; Electronic equipment testing; Integrated circuit interconnections; Probes; Semiconductor device testing; Voltage;
Conference_Titel :
Microelectronic Test Structures, 1992. ICMTS 1992. Proceedings of the 1992 International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0535-3
DOI :
10.1109/ICMTS.1992.185936
