DocumentCode :
2899381
Title :
The 2k2: a modular computational toolkit for embedded signal processing
Author :
Shadich, R. ; McLoughlin, Ian Vince
Author_Institution :
Group Res., Tait Electron. Ltd., Christchurch, New Zealand
Volume :
3
fYear :
2003
fDate :
15-18 Dec. 2003
Firstpage :
1645
Abstract :
Computational hardware has become prevalent in recent years for signal processing applications for reasons such as flexibility, implementation efficiency and cost-effectiveness. The large variety of architectures available from many vendors has enabled a profusion of competing architectures, assembly languages and feature sets to match many individual applications. Although a single computational device may well suit a particular application, it seldom suits very many other applications closely. From an industrial perspective, this is inefficient since either system developers who are familiar with one processor from a previous project choose to use it for the next project, where it may be less suitable or they are faced with the long and costly learning curve implied in the adoption of an new architecture. Even when a new architecture is demonstrably better than older architectures for a given project, engineers will tend to work around the deficiencies in the older architecture rather than accept the learning curve for the new architecture. A preferable approach would be to allow computational hardware to be adapted at a microarchitecture level to match the application within a particular project, whilst maintaining a common instruction set, development tool chain and system framework. The paper introduces the 2k2, a flexible and modular computational system that allows developers to standardise on a signal processing solution for a wide variety of applications without requiring either a costly learning exercise, or necessitating a compromise between actual processor capability and requirement. The proposed system also allows late changes to processor capability without either costly hardware changes or lengthy software redesign.
Keywords :
programmable logic devices; signal processing; standardisation; architecture-level functional units; computational hardware; data transfer architecture; embedded signal processing; modular computational toolkit; programmable logic; project management; Computer architecture; Embedded computing; Field programmable gate arrays; Hardware; Manufacturing processes; Microarchitecture; Programmable logic arrays; Signal processing; Silicon; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information, Communications and Signal Processing, 2003 and Fourth Pacific Rim Conference on Multimedia. Proceedings of the 2003 Joint Conference of the Fourth International Conference on
Print_ISBN :
0-7803-8185-8
Type :
conf
DOI :
10.1109/ICICS.2003.1292747
Filename :
1292747
Link To Document :
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