Title :
A 4-channel 12.5Gb/s Common-Gate Transimpedance Amplifier Array for DVI/HDMI Applications
Author :
Park, K. ; Oh, W.S. ; Choi, B.-Y. ; Han, J.-W. ; Park, S.M.
Author_Institution :
Dept. of Electron. Eng., Yonsei Univ., Seoul
Abstract :
In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-mum standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBH transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-muA average input noise current that corresponds to -18dBm sensitivity for 10-12 BER. The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; multimedia systems; photodiodes; telecommunication cables; 0.18 micron; 1.52 muA; 1.8 V; 12.5 Gbit/s; 2 pF; 2.1 GHz; 200 mW; 3.125 Gbit/s; CMOS technology; ESD protection pad capacitance; common-gate configuration; common-gate transimpedance amplifier array; differential transimpedance amplifier array; digital visual interface cables; high-definition multimedia interface cables; input parasitic capacitance; photodiode capacitance; post-layout simulations; Bandwidth; Bit error rate; CMOS technology; Cables; Differential amplifiers; Electrostatic discharge; Page description languages; Parasitic capacitance; Photodiodes; Protection;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378609
