Three-dimensional effects of latchup turn-on CMOS and forward-biased n+-diode measured by photoemission

Three-dimensional (3-D) effects of latchup and forward currents in scaled n-well CMOS test devices are discussed by comparing the photoemission-intensity analyses with device simulations. For studying 3-D effects in latchup turn-on CMOS devices and forward-biased n⁺ diodes fabricated by a scaled n-well CMOS process, photoemission-intensity distributions were measured by using CMOS test device structures with various dimensional n⁺/p⁺-diffusion widths and n⁺-p⁺ spacings. It was confirmed that total photoemission intensities integrated over the device area were proportional to both supply and forward currents. Spreading distances where the photoemission-intensities decrease to 10% were estimated to be about 8-13 μm and 34-37 μm from the n⁺/p⁺ diffusion edges depending on the diffusion widths of 4-40 μm for the latchup turn-on devices and the forward-biased n⁺ diodes, respectively