DocumentCode
2900197
Title
Optimal Data Placement for Memory Architectures with Scratch-Pad Memories
Author
Guo, Yibo ; Zhuge, Qingfeng ; Hu, Jingtong ; Sha, Edwin H -M
Author_Institution
Sch. of Inf. Sci. & Eng., Hunan Univ., Changsha, China
fYear
2011
fDate
16-18 Nov. 2011
Firstpage
1045
Lastpage
1050
Abstract
Scratch-Pad Memory (SPM) has been widely adopted in many embedded systems as well as digital signal processor systems. This paper proposes a polynomial time optimal data placement algorithm to minimize the memory access cost of one program region for memory architectures with multiple types of memory units including SPM in order to achieve high performance with low cost. The experimental results show our algorithms can reduce time cost of memory access by 18.19% and the energy cost by 16.97% compared with random data placement, which is better than the existing greedy algorithms.
Keywords
computational complexity; embedded systems; memory architecture; SPM; digital signal processor systems; embedded systems; greedy algorithms; memory architectures; polynomial time optimal data placement algorithm; scratch-pad memories; Arrays; Dynamic programming; Heuristic algorithms; Memory architecture; Memory management; Random access memory; Resource management; Data placement; Embedded System; Scratch-Pad Memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Trust, Security and Privacy in Computing and Communications (TrustCom), 2011 IEEE 10th International Conference on
Conference_Location
Changsha
Print_ISBN
978-1-4577-2135-9
Type
conf
DOI
10.1109/TrustCom.2011.143
Filename
6120936
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