DocumentCode
2901217
Title
Cost benefit tradeoffs for ASIC versus programmable logic device
Author
Greggain, Lance
Author_Institution
Genesis Microchip, Markham, Ont., Canada
fYear
1990
fDate
17-21 Sep 1990
Abstract
Two approaches to the implementation of logic-gate arrays and programmable logic are compared. It is shown that there is a large advantage of using gate arrays instead of programmable logic device field-programmable gate arrays (PLD/FPGAs). The performance of the circuits is dramatically improved in terms of speed, power consumption, reduction in parts cost, and reliability of the circuits. Gate array (GA) technology has all of the advantages over PLD/FPGA that is has over transistor-transistor logic (TTL) circuitry. Some programmable devices have a somewhat higher level of integration than most TTL parts. Breadboarding with programmable devices and converting to GA has the disadvantage of being more costly and time consuming than designing directly with GA
Keywords
application specific integrated circuits; cellular arrays; logic arrays; ASIC; cost benefit tradeoffs; field-programmable gate arrays; logic-gate arrays; programmable logic device; Application specific integrated circuits; Costs; Energy consumption; Field programmable gate arrays; Integrated circuit reliability; Logic arrays; Logic circuits; Logic devices; Programmable logic arrays; Programmable logic devices;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186091
Filename
186091
Link To Document