Title :
ASIC design in a next generation workstation
Author_Institution :
Sun Microsystems Inc., Mountain View, CA, USA
Abstract :
The activities of the design team formed for development of a follow-on machine to the Sparcstation 1 are discussed. The design team partitioned the design into four chips: the cache controller (CACHE+), memory management unit (MMU+), direct memory access (DMA+), and dynamic memory controller (RAM+). Architectural changes and higher integration eliminated two of the ASICs used on the Sparcstation 1 and dropped the usage of one of the ASICs from two to one part per board. One ASIC, a video controller, was reused. The manpower requirements of the project and the design/verification tools used by the design team are discussed
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; buffer storage; circuit CAD; design engineering; file organisation; storage management chips; workstations; ASIC design; CACHE+; DMA+; MMU+; RAM+; cache controller; design/verification tools; direct memory access; dynamic memory controller; follow-on machine; higher integration; manpower requirements; memory management unit; new Sparcstation; next generation workstation; video controller; Analytical models; Application specific integrated circuits; Design engineering; Electronics packaging; Large scale integration; Manufacturing; Personnel; Power system management; Sun; Workstations;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186100
