• DocumentCode
    2901408
  • Title

    Tooling up for reconfigurable system design

  • Author

    Brebner, Gordon

  • Author_Institution
    Div. of Inf., Edinburgh Univ., UK
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    42401
  • Lastpage
    42404
  • Abstract
    Reconfigurable logic is programmable-a fact that exposes many questions concerning the nature of appropriate design processes for reconfigurable circuitry, given the context of legacy effects from conventional hardware design and software design. Work in the area of system-level design, featuring hardware/software co-design, offers some pointers to possible solutions, but it does not give a complete answer to harnessing the full potential of reconfigurable logic, particularly dynamically reconfigurable logic. In fact, it seems that a radical review of design flows and design tools is necessary-potentially, a very large-scale undertaking. This paper suggests one path towards new design flows and the supporting tools required. The essence is that both control flow and data flow methods should be equally accessible to the algorithm designer, with no irrevocable commitment made to one method or another at any particular level of the design. Further, flexibility in architectures should be made available as an aid to designing algorithms. The aim is a fundamental paradigm change in system design, from a world where there is higher-level algorithm/program/software design on one side and lower-level architecture/circuit/hardware design on the other side, to a new world with programs/circuits, algorithms/architectures and softness/hardness as three distinct design trade-offs. Configurable logic circuitry is one of the physical underpinnings of the new world, alongside familiar components such as processor cores and memories. The advent of system-level integrated chips will be a major asset in realising the imaginative physical architectures required
  • Keywords
    logic design; control flow; data flow; hardware/software co-design; reconfigurable logic; reconfigurable system design; system-level integrated chips;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Reconfigurable Systems (Ref. No. 1999/061), IEE Colloquium on
  • Conference_Location
    Glasgow
  • Type

    conf

  • DOI
    10.1049/ic:19990344
  • Filename
    773171