A Randomized Scheme for IP Lookup at Wire Speed on NetFPGA

Author

Antichi, Gianni ; Di Pietro, Andrea ; Ficara, Domenico ; Giordano, Stefano ; Procissi, Gregorio ; Vitucci, Fabio

Author_Institution

Dept. of Inf. Eng., Univ. of Pisa, Pisa, Italy

fYear

2010

fDate

23-27 May 2010

Firstpage

1

Lastpage

5

Abstract

Because of the rapid growth of both traffic and links capacity, the time budget to perform IP address lookup on a packet continues to decrease and lookup tables of routers unceasingly grow. Therefore, new lookup algorithms and new hardware platform are required to perform fast IP lookup. This paper presents a new scheme on top of the NetFPGA board which takes advantage of parallel queries made on perfect hash functions. Such functions are built by using a very compact and fast data structure called Blooming Trees, thus allowing the vast majority of memory accesses to involve small and fast on-chip memories only.

Keywords

IP networks; computer network security; cryptography; data structures; field programmable gate arrays; telecommunication network routing; telecommunication traffic; IP address lookup; NetFPGA board; blooming trees; data structure; hardware platform; links capacity; perfect hash function; randomized scheme; routers; traffic; Cams; Clocks; Communications Society; Data structures; Field programmable gate arrays; Hardware; Internet; Routing; Tree data structures; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications (ICC), 2010 IEEE International Conference on

Conference_Location

Cape Town

ISSN

1550-3607

Print_ISBN

978-1-4244-6402-9

Type

conf

DOI

10.1109/ICC.2010.5502019

Filename

5502019