• DocumentCode
    2901573
  • Title

    IC technology R&D for the next century

  • Author

    Nishi, Yoshio

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Summary form only given. As we have gone through the era of integrated circuits, more strictly silicon-based CMOS integrated circuits, where integration density has increased from hundreds of transistors on a chip to almost one quarter of a billion transistors on a chip, a way to develop technology itself has come to the point where we must examine any possible new model for research and development. Technology trends which have been well discussed in forums such as consortia in the USA, Japan, Europe, South-east Asian countries are now converging reasonably, with some differences due to the differences of so-called “technology drivers”. Common parameters are the minimum geometries, though they have increasingly become more conceptual parameters as opposed to what can be found on a real chip. Obviously, the density of active elements per unit area and the number of interconnect layers are more important parameters for high-density memories and high performance processors, respectively. The purpose of this talk is not to discuss the technology trend itself, but to examine how we have developed technology and how we can possibly continue in the future
  • Keywords
    CMOS integrated circuits; VLSI; integrated circuit design; integrated circuit interconnections; integrated memory circuits; microprocessor chips; product development; research and development management; technological forecasting; IC minimum geometries; IC technology R&D; R&D consortia; active element density; chip transistor count; conceptual parameters; high-density memories; integrated circuits; integration density; interconnect layers; microprocessors; research and development model; silicon-based CMOS integrated circuits; technology drivers; technology trends; CMOS integrated circuits; CMOS technology; Europe; Instruments; Integrated circuit modeling; Integrated circuit technology; Investments; Research and development; Semiconductor device modeling; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Statistical Metrology, 1999. IWSM. 1999 4th International Workshop on
  • Conference_Location
    Kyoto
  • Print_ISBN
    0-7803-5154-1
  • Type

    conf

  • DOI
    10.1109/IWSTM.1999.773182
  • Filename
    773182