Design of IIR Variable Fractional Delay Digital Filters

In this paper, a novel method for designing IIR variable fractional delay (VFD) digital filters with variable and fixed denominator is presented. First of all, a peak-constrained weighted least-squares (PCWLS) method is employed to design a set of FIR fixed fractional delay (FD) filters according to given specifications. The PCWLS FIR filters are implemented by the projected least-squares (PLS) algorithm. An iterative WLS model reduction technique is utilized to design denominators, which can guarantee the stability of designed IIR VFD filter if the iteration converges. The numerator of IIR fixed FD filters can be designed by two approaches: The Approach 1 solves linear equations based on the orthogonality principle; and the Approach 2 formulates the numerator design problem as a standard quadratic programming (QP) problem. The coefficients of IIR fixed FD filters are finally approximated by polynomial functions of FD. Three sets of examples are given to demonstrate the effectiveness of the proposed method.