Title :
Design system for special purpose processor executing algorithms described by higher level language
Author :
Shirai, K. ; Ikenaga, T. ; Kitabatake, H.
Author_Institution :
Dept. of Electr. Eng., Waseda Univ., Tokyo, Japan
Abstract :
In order to satisfy the user´s requirements which are described by a high level language, a large number of possibilities must be examined to find a good design. The case in which the architecture is restricted to that having a usual instruction set is considered. The main objective of the system is to generate a minimal set of hardware which can execute the given algorithms and also satisfy other requirements such as speed, hardware cost, and I/O condition. It realizes an integrated system which provides not only a hardware design environment but also a software one by generating automatically a higher-level language compiler which has optimization capability for the processor at the same time. As a practical example, the design of a special-purpose processor which can execute thirteen typical digital signal processing algorithms is demonstrated. It is shown that the design system can provide ASIC users a total environment to design and use special-purpose processors. The software development tools are superior to those usable for general-purpose DSPs
Keywords :
VLSI; application specific integrated circuits; digital signal processing chips; special purpose computers; I/O condition; digital signal processing algorithms; hardware cost; hardware design environment; higher level language; minimal hardware set; optimization capability; software design environment; software development tools; special purpose processor; special purpose processor design system; speed; usual instruction set; Algorithm design and analysis; Application specific integrated circuits; Costs; Design optimization; Digital signal processing; Hardware; High level languages; Optimizing compilers; Signal design; Signal processing algorithms;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186135