DSP synthesis

Author

Gass, Wanda ; Wong, Yiwan ; Yoshino, Toshiaki ; Johnson, Louis

Author_Institution

Texas Instruments, Dallas, TX, USA

fYear

1990

fDate

17-21 Sep 1990

Abstract

The high performance demands of digital signal processing (DSP) applications can be achieved by tailoring the design of integrated circuits to specific functions. The design of high-speed ASICs is often a difficult and time consuming task, however. Two function-specific compilers which greatly reduce the design time without sacrificing performance are described. The first compiler generates a finite impulse response (FIR) filter circuit. The second compiler generates an ASIC customized for computing the fast Fourier transform (FFT). A high-level description of the behavior of the circuit is passed to the compiler which automatically generates the netlist and floorplan targeted for BiCMOS sea-of-gates technology

Keywords

BIMOS integrated circuits; application specific integrated circuits; circuit layout CAD; digital filters; digital signal processing chips; fast Fourier transforms; BiCMOS; DSP ASICs; DSP synthesis; FFT processor compiler; FIR filter circuit compiler; design of high-speed ASICs; design time reduction; floorplan generation; function-specific compilers; high-level description; netlist generation; sea-of-gates technology; silicon compilers; Application specific integrated circuits; BiCMOS integrated circuits; Digital signal processing; Finite impulse response filter; Frequency response; Instruments; Integrated circuit synthesis; Libraries; Signal design; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1990.186141

Filename

186141