Title :
JTAG and Hitachi´s autodiagnosis
Author :
Souza, Daniel D.
Author_Institution :
Hitachi America Ltd., Brisbane, CA, USA
Abstract :
The autodiagnosis technique that uses scan design is described and its relation to the IEEE Joint Test Action Group (JTAG) boundary scan is pointed out. The similarities between autodiagnosis and the JTAG boundary scan are emphasized. JTAG and the tradeoffs in such a conversion are discussed
Keywords :
application specific integrated circuits; built-in self test; digital integrated circuits; integrated circuit testing; logic testing; BIST; Hitachi´s autodiagnosis; IEEE; JTAG; JTAG boundary scan; Joint Test Action Group; autodiagnosis technique; scan design; similarities; tradeoffs; Automatic control; Automatic testing; Circuit faults; Circuit testing; Clocks; Latches; Pins; Samarium; Sequential analysis; Sequential circuits;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186152
