Bridges in sequential CMOS circuits: current-voltage signature

Author

Rodriguez-Montanes, R. ; Figueras, J.

Author_Institution

Dept. d´´Enginyeria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain

fYear

1997

fDate

27 Apr-1 May 1997

Firstpage

68

Lastpage

73

Abstract

The I_DDQ-V_DD signature for sequential CMOS circuits with bridging defects is characterized. In combinational circuits with a bridging defect, an increase in V_DD results in a higher I_DDQ value flowing through the defect, however, the total current may decrease as it will be shown. In sequential circuits with bridging defects connecting control loop nodes, the V_DD-I_DDQ signature may present intervals of constant non defective I_DDQ value. The signature may be used to diagnose certain types of bridging defects in sequential CMOS circuits

Keywords

CMOS logic circuits; fault diagnosis; integrated circuit testing; logic testing; sequential circuits; I_DDQ-V_DD signature; bridging defects; control loop nodes; current-voltage signature; fault diagnosis; sequential CMOS circuits; temperature dependence; Bridge circuits; CMOS memory circuits; CMOS process; Circuit faults; Circuit testing; Joining processes; Power supplies; Sequential analysis; Sequential circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 1997., 15th IEEE

Conference_Location

Monterey, CA

ISSN

1093-0167

Print_ISBN

0-8186-7810-0

Type

conf

DOI

10.1109/VTEST.1997.599443

Filename

599443