Title :
Metastability-a designer´s viewpoint
Author_Institution :
Boeing Co., Seattle, WA, USA
Abstract :
Metastability of CMOS sequential logic is examined from a practical viewpoint. Metastability is defined, and its causes are addressed. How metastability occurs and how it can affect a design are considered. Environmental factors and configuration differences which contribute to metastable behavior are examined with the purpose of minimizing the detrimental influences. Techniques for resolving a metastability problem range from device level all the way to system level
Keywords :
CMOS integrated circuits; integrated logic circuits; logic design; sequential circuits; CMOS sequential logic; configuration differences; device level; metastability; metastable behavior; system level; CMOS logic circuits; Clocks; Feedback circuits; Feedback loop; Latches; Logic circuits; Metastasis; Space vector pulse width modulation; Timing; Transfer functions;
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
DOI :
10.1109/ASIC.1990.186192
