DocumentCode
2902838
Title
The ideal multiplier compiler
Author
Bapst, Mark V.
Author_Institution
VLSI Technol. Inc., Pompano Beach, FL, USA
fYear
1990
fDate
17-21 Sep 1990
Abstract
The ideal multiplier compiler is defined as one which produces a product that achieves high performance and high density and is also portable to different technologies. In addition, such a compiler should support multiple data formats and extend to any data size. It should be reconfigurable and evolvable, and it should incorporate automatic test vector generation (ATVG). The multiplier presented meets all of these requirements
Keywords
automatic testing; logic testing; multiplying circuits; program compilers; automatic test vector generation; data size; density; multiple data formats; multiplier compiler; performance; reconfigurable; Arithmetic; Foundries; Frequency; Libraries; Optimizing compilers; Paper technology; Silicon compiler; Testing; Vehicles; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186204
Filename
186204
Link To Document