• DocumentCode
    2902913
  • Title

    Fine Line Photolithography and Ultra High Density Package Substrate for Next Generation System-on-Package (SOP)

  • Author

    Liu, Fuhan ; Sundaram, Venky ; Wiedenman, Boyd ; Tummala, Rao

  • Author_Institution
    Georgia Inst. of Technol., Atlanta
  • fYear
    2007
  • fDate
    14-17 Aug. 2007
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Rapid changes will continue in the trend toward system integration and microminiaturization. System-on-a package (SOP) is a highly integrated packaging solution based on embedding thin film passive and active components in ultra high density build-up substrates. The SOP-substrate provides a platform leading to system multi-functional and microminiaturization which demands additional wiring capability for routing chips and interconnecting embedded components. Fine line photolithography with I-line UV light is the key enabling technology to achieve the required wiring density on substrate at low cost. We have studied the fundamentals of fine image transfer by I-line photolithography based on proximity exposure. The relationship of achievable minimum feature size and gap distance between photo-mask and photo resist was investigated by calculations and experiments. Calculation showed that as fine as 2 mum line and space could be achievable on an 8 mum thick photo resist at gap of zero. While experimental results showed that 6 mum line and space was obtained with gap of zero and 10 mum line and space was obtained at gap of 60 mum. 60 mum is the maximum gap for resolving sub-10 mum line and space by I-line photolithography. Fine line categories for package substrate and related technologies are summarized. Finally we demonstrate a build-up layer having extremely high wiring capability for 100 mum pitch area array flip chip with 3 copper routing lines per pitch and 1,600 bumps per layer for satisfying year 2010 semiconductor roadmap microprocessor requirements.
  • Keywords
    masks; photolithography; proximity effect (lithography); system-in-package; I-line UV light; I-line photolithography; SOP-substrate; active components; embedded components; fine image transfer; fine line photolithography; gap distance; highly integrated packaging solution; microminiaturization; photo resist; photo-mask; proximity exposure; system integration; system-on-package; thin film passive components; ultra high density build-up substrates; ultra high density package substrate; wiring capability; wiring density; Costs; Flip chip; Lithography; Resists; Routing; Semiconductor device packaging; Space technology; Substrates; Transistors; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Packaging Technology, 2007. ICEPT 2007. 8th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-1392-8
  • Electronic_ISBN
    978-1-4244-1392-8
  • Type

    conf

  • DOI
    10.1109/ICEPT.2007.4441387
  • Filename
    4441387