InAs/SiGe on Si nanowire tunneling field effect transistors

Tunneling field-effect transistors (TFETs) are of tremendous interest for advanced logic applications due to their potential for sub-60-mV/dec subthreshold slope which could enable supply voltage scaling beyond what is practical for conventional MOSFETs. However, TFETs based upon tunneling in Si suffer from low on current, I_ON, and fail to provide steep slope at high current levels. III-V TFETs are more promising due to their potential for high drive current, but the poor gate oxide quality remains a significant challenge. In conclusion, our results show that hybrid InAs/SiGe p-TFETs may lead to improved drive currents and steeper subthreshold slope compared to InAs/Si devices. On currents as high as 150 μA/μm at 1 nA/μm and Vds = 0.5 V are possible using 50% SiGe. However, these devices have a fundamental trade-off between the source doping and the substhreshold slope which limits the maximum I_on and I_on/l_οff ratios that can be obtained. The effect of defects in both InAs/Si and InAs/SiGe TFETs remain outstanding issues requiring further study.