Title :
A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme
Author :
Yang, Byung-Do ; Lee, Jae-Eun ; Kim, Jang-Su ; Cho, Junghyun ; Lee, Seung-Yun ; Yu, Byoung-Gon
Author_Institution :
Chungbuk Nat. Univ.
Abstract :
A low power PRAM using a data-comparison write (DCW) scheme is proposed. The PRAM consumes large write power because large write currents are required during long time. At first, the DCW scheme reads a stored data during write operation. And then, it writes an input data only when the input and stored data are different. Therefore, it can reduce the write power consumption to a half. The 1K-bit PRAM test chip with 128times8bits is implemented with a 0.8mum CMOS technology with a 0.5mum GST cell.
Keywords :
CMOS memory circuits; low-power electronics; phase change materials; random-access storage; 0.5 micron; 0.8 micron; 1 kbit; CMOS technology; data-comparison write scheme; low power phase-change random access memory; write power consumption; CMOS technology; Circuits; Electric resistance; Energy consumption; Flash memory; Flowcharts; MOS devices; Phase change random access memory; Random access memory; Testing;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.377981
