Title :
RECALS II: a new list scheduling algorithm
Author :
Rim, Minjoong ; Jain, Rajiv
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Abstract :
Presents a new scheduling heuristic RECALS II for high-level synthesis applications. RECALS II accepts a directed acyclic graph and a set of resources and schedules the graph while minimizing the number of clock cycles required to execute it. Experiments show that schedules produced by RECALS II are close to the optimal solutions
Keywords :
circuit CAD; circuit optimisation; computational complexity; data flow graphs; directed graphs; high level synthesis; minimisation; scheduling; RECALS II; clock cycles number; directed acyclic graph; high-level synthesis; list scheduling algorithm; minimization; optimal solutions; resources; scheduling heuristic; Application software; Clocks; Delay; High level synthesis; NP-complete problem; Processor scheduling; Scheduling algorithm;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1994. ICASSP-94., 1994 IEEE International Conference on
Conference_Location :
Adelaide, SA
Print_ISBN :
0-7803-1775-0
DOI :
10.1109/ICASSP.1994.389612
