• DocumentCode
    2903488
  • Title

    Devices for high performance computing beyond 14nm node - is there anything other than Si?

  • Author

    Haensch, Wilfried

  • Author_Institution
    T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
  • fYear
    2011
  • fDate
    20-22 June 2011
  • Firstpage
    5
  • Lastpage
    8
  • Abstract
    A scaling path for Si based technology seems possible to the 8nm node. Power limitation will force to reduce the supply voltage at the expense of device performance and susceptibility to process variations. A lower limit of Vdd=0.5V seems feasible. Parallelism on system level will provide system through put which stresses architecture and software development. In particular legacy code will be a problem for a transition period that might require dual supply multi core architectures. In this scenario device technology has to cater to both high voltage and low voltage operation. Beyond the 8nm node new device concepts are needed. Considering the time frame of a 2019 manufacturing for this node a device has to be demonstrated now. At this point CNTs seem to be the only viable option for the post Si area.
  • Keywords
    CMOS integrated circuits; microprocessor chips; multiprocessing systems; Si based technology; dual supply multicore architectures; high performance computing; software development; system level parallelism; CMOS integrated circuits; Indium gallium arsenide; Logic gates; Silicon; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2011 69th Annual
  • Conference_Location
    Santa Barbara, CA
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-61284-243-1
  • Electronic_ISBN
    1548-3770
  • Type

    conf

  • DOI
    10.1109/DRC.2011.5994486
  • Filename
    5994486