DocumentCode
2903721
Title
On the fault coverage of interconnect diagnosis
Author
Chen, X.T. ; Meyer, F.J. ; Lombardi, E.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
1997
fDate
27 Apr-1 May 1997
Firstpage
101
Lastpage
107
Abstract
This paper deals with the inverse problem (namely, diagnosability) for diagnosing bridge faults in interconnects. Given a test set (T) and the layout of an interconnect, the diagnosability problem consists of establishing the probability (coverage) of diagnosing (detection and/or location) all faults and to identify the undiagnosable faults (if any). It is proved that this process is equivalent of checking each edge in the adjacency graph representation of the layout using the tests in T (either parallel, or sequential test vectors). Different algorithms are given for diagnosis and detection
Keywords
fault diagnosis; graph theory; integrated circuit interconnections; integrated circuit testing; inverse problems; logic testing; adjacency graph; algorithm; bridge fault; fault coverage; fault detection; fault location; interconnect diagnosis; inverse problem; layout; parallel test vector; probability; sequential test vector; test set; Bridges; Computer science; Fault detection; Fault diagnosis; Field programmable gate arrays; Inverse problems; Joining processes; Polynomials; Sequential analysis; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1997., 15th IEEE
Conference_Location
Monterey, CA
ISSN
1093-0167
Print_ISBN
0-8186-7810-0
Type
conf
DOI
10.1109/VTEST.1997.599450
Filename
599450
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