DocumentCode :
2903903
Title :
Layout-Aware Scan Chain Reorder for Skewed-Load Transition Test Coverage
Author :
Wang, Sying-Jyan ; Peng, Kuo-Lin ; Li, Katherine Shu-Min
Author_Institution :
Dept. of Comput. Sci., National Chung Hsing Univ., Taichung
fYear :
2006
fDate :
Nov. 2006
Firstpage :
169
Lastpage :
174
Abstract :
In this paper, we propose a layout-based scan chain ordering method to improve fault coverage for skewed-load delay test with minimum routing overhead. This approach provides many advantages over previous methods. (1) The proposed method can provide 100% test pair coverage for all detectable transition faults. (2) With layout information taken into account, the routing penalty is small, and thus the impact on circuit performance is not significant
Keywords :
boundary scan testing; fault diagnosis; integrated circuit testing; logic testing; network routing; fault coverage; layout-aware scan chain reorder; layout-based scan chain ordering method; minimum routing overhead; routing penalty; skewed-load transition test; transition faults; Circuit faults; Circuit testing; Clocks; Computer science; Delay; Electrical fault detection; Fault detection; Logic testing; Routing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location :
Fukuoka
ISSN :
1081-7735
Print_ISBN :
0-7695-2628-4
Type :
conf
DOI :
10.1109/ATS.2006.261016
Filename :
4030764
Link To Document :
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