Title :
An effective methodology for on-line testing of embedded microprocessors
Author :
Bernardi, P. ; Ciganda, L. ; Sanchez, E. ; Reorda, M. Sonza
Author_Institution :
Dipt. di Autom. e Inf., Politec. di Torino, Torino, Italy
Abstract :
Testing embedded microprocessors at mission time is nowadays a requirement in many SoC applications. In this paper, we introduce a methodology where the detection of operational faults is performed while the normal operations are temporarily suspended, by means of an ad-hoc HW module connected to the address, data and control buses of the microprocessor. This module behaves as a peripheral towards the microprocessor but is able to gain access to the bus over the system memory during the test. The proposed approach uses the microprocessor interrupt protocol to preserve the system state. Experimental results, gathered on a MIPS core, show the feasibility and effectiveness of the approach.
Keywords :
integrated circuit testing; microprocessor chips; system-on-chip; MIPS core; SoC applications; ad-hoc HW module; embedded microprocessors on-line testing; microprocessor interrupt protocol; Built-in self-test; Hardware; Microprocessors; Random access memory; Registers; System-on-a-chip; On-line test; hardware BIST; microprocessor test;
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International
Conference_Location :
Athens
Print_ISBN :
978-1-4577-1053-7
DOI :
10.1109/IOLTS.2011.5994541
