DocumentCode
2904534
Title
High-Voltage Analog Circuit Design using Thin-Oxide MOS Devices only
Author
Seo, Dongwon ; Guo, Yuhua ; Mishra, Manu
Author_Institution
Qualcomm Inc., San Diego, CA
fYear
2007
fDate
27-30 May 2007
Firstpage
3339
Lastpage
3342
Abstract
Electrical stress-relieved analog circuit design techniques using only thin-oxide devices are presented. Level shifters as well as optional diode insertion are carefully used to meet the electrical stress limit rules. The proposed idea was demonstrated with 12-bit I/Q digital-to-analog converter (DAC) in 65-nm CMOS technology and a high-operating temperature life (HTOL) test was performed to review the reliability of the design.
Keywords
CMOS integrated circuits; analogue circuits; digital-analogue conversion; integrated circuit design; integrated circuit reliability; life testing; 12 bit; 65 nm; CMOS technology; digital-to-analog converter; diode insertion; electrical stress limit rules; high-voltage analog circuit; level shifters; temperature life test; thin-oxide MOS devices; Analog circuits; CMOS technology; Circuit testing; Digital-analog conversion; Diodes; Life testing; MOS devices; Performance evaluation; Stress; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378226
Filename
4253394
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