VLSI chip architecture for real-time ambiguity function computation

An algorithm, the AGT algorithm, for efficient computation of the decimated cross-ambiguity function on arbitrary sampling grids was developed by L. Auslander et al. (1991). Based on a simple modification of the AGT algorithm, a VLSI chip architecture for real-time computation of the cross-ambiguity function magnitude is presented. Using actual radar examples, the authors discuss the design trade-offs, and demonstrate the scalability of the architecture needed to accommodate different data lengths and sampling grid sizes. The architecture is shown to be potentially quite useful for a wide range of typical radar systems