DocumentCode :
2904549
Title :
Interleaving of Delay Fault Tes Data for Efficient Test Compression with Statistical Coding
Author :
Namba, Kazuteru ; Ito, H.
Author_Institution :
Fac. of Eng., Chiba Univ.
fYear :
2006
fDate :
Nov. 2006
Firstpage :
389
Lastpage :
394
Abstract :
This paper proposes a method providing efficient test compression for delay fault testing using enhanced scan design. In the proposed method, the initial and transition vectors of test data are interleaved before test compression using statistical coding. This paper also shows test architecture for delay fault testing using the proposed method. The proposed method is experimentally evaluated from the viewpoint of compression rates. For robust testable path delay fault testing on 11 out of 23 ISCA589 benchmark circuits, the combination of Huffman coding and the proposed method provides higher compression rates than Huffman coding without the proposed method, run-length coding, Golomb coding, frequency-directed run-length (FDR) coding and variable-length input Huffman coding (VIHC)
Keywords :
Huffman codes; automatic test pattern generation; data compression; integrated circuit testing; Golomb coding; ISCA589 benchmark circuits; VIHC; delay fault testing; enhanced scan design; run-length coding; statistical coding; test compression; transition vectors; two-pattern testing; variable-length input Huffman coding; Automatic testing; Circuit faults; Circuit testing; Delay; Fault detection; Huffman coding; Interleaved codes; Robustness; System testing; Very large scale integration; delay; enhanced scan design.; fault testing; statistical coding; test compression; two-pattern testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location :
Fukuoka
ISSN :
1081-7735
Print_ISBN :
0-7695-2628-4
Type :
conf
DOI :
10.1109/ATS.2006.260960
Filename :
4030796
Link To Document :
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