DocumentCode
2904587
Title
BCH-based Compactors of Test Responses with Controllable Masks
Author
Reungpeerakul, Taweesak ; Qian, Xiaoshu ; Mourad, Samiha
Author_Institution
Santa Clara Univ., CA
fYear
2006
fDate
20-23 Nov. 2006
Firstpage
395
Lastpage
401
Abstract
This paper presents a novel approach to compacting test response results for a multiple scan chains design. The compactors are based on (n+1, k) extended BCH code and guarantee detecting up to 2t single-bit errors and any odd number of single-bit errors, where n, k, t are integers depending on the particular BCH code used. Another technique uses controllable masks to handle any number of X´s on test responses. The techniques have ability to detect more single-bit errors with minimum numbers of compactor outputs and can be used to reduce tester channels, test application time, and test data volume, independent of circuit under test (CUT) and fault models
Keywords
design for testability; fault simulation; integrated circuit testing; masks; BCH compactors; circuit under test; controllable masks; extended BCH code; fault models; multiple scan chains design; single-bit errors; test application time; test data volume; test responses; Circuit faults; Circuit testing; Compaction; Design for testability; Educational institutions; Fault detection; Impulse testing; Logic testing; System testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2006. ATS '06. 15th Asian
Conference_Location
Fukuoka
ISSN
1081-7735
Print_ISBN
0-7695-2628-4
Type
conf
DOI
10.1109/ATS.2006.260961
Filename
4030797
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