DocumentCode :
2904864
Title :
Layout-aware multi-cell upsets effects analysis on TMR circuits implemented on SRAM-based FPGAs
Author :
Sterpone, L. ; Violante, M. ; Bocquillon, A. ; Miller, F. ; Buard, N. ; Manuzzato, A. ; Gerardin, S. ; Pacagnella, A.
fYear :
2009
fDate :
14-18 Sept. 2009
Firstpage :
98
Lastpage :
101
Abstract :
We developed a tool combining the layout information obtained from laser screening of a device with an algorithm for estimating multi-cell upsets effects on TMR circuits implemented on SRAM-based FPGAs. Detailed experimental results are provided.
Keywords :
SRAM chips; field programmable gate arrays; integrated circuit layout; SRAM-based FPGA; TMR circuits; field programmable gate arrays; laser screening; layout-aware multicell upsets effects analysis; triple modular redundancy; Field programmable gate arrays; Laser theory; Random access memory; Semiconductor lasers; Testing; Tunneling magnetoresistance; Laser testing; Multi-Cell Upsets; SRAM-based FPGAs; Static Analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radiation and Its Effects on Components and Systems (RADECS), 2009 European Conference on
Conference_Location :
Bruges
ISSN :
0379-6566
Print_ISBN :
978-1-4577-0492-5
Electronic_ISBN :
0379-6566
Type :
conf
DOI :
10.1109/RADECS.2009.5994561
Filename :
5994561
Link To Document :
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