DocumentCode
2905763
Title
A custom instruction approach for hardware and software implementations of finite field arithmetic over F2163 using Gaussian normal bases
Author
Juliato, Marcio ; Araujo, Guido ; López, Julio ; Dahab, Ricardo
Author_Institution
Inst. of Comput., Campinas Univ., Brazil
fYear
2005
fDate
11-14 Dec. 2005
Firstpage
5
Lastpage
12
Abstract
In this paper we explore the potential use of custom instructions in a reconfigurable hardware platform to accelerate arithmetic operations in the binary field F2163 using a Gaussian normal basis representation. System-on-chip (SOC) techniques based on field programmable gate arrays (FPGAs) are used, making it possible to run real applications on the system while considering all execution overheads. Thus we are able to fairly compare hardware and software performances, as well as precisely determine their speedups. Using this approach, we show that a field multiplication can be accelerated over 2619 times when implemented in hardware. Moreover, using this fast field multiplier in a hardware/software approach, we accelerate point multiplication, the fundamental operation of ECC, over 116 times.
Keywords
Gaussian processes; digital arithmetic; field programmable gate arrays; logic design; reconfigurable architectures; system-on-chip; Gaussian normal basis representation; binary field; field programmable gate array; finite field arithmetic; hardware implementation; reconfigurable hardware platform; software implementation; system-on-chip; Acceleration; Application software; Arithmetic; Elliptic curve cryptography; Field programmable gate arrays; Galois fields; Gaussian processes; Hardware; Polynomials; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on
Print_ISBN
0-7803-9407-0
Type
conf
DOI
10.1109/FPT.2005.1568517
Filename
1568517
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