Title :
Design and Implementation of FPGA-based Systolic Array for LZ Data Compression
Author :
El Ghany, Mohamed A Abd ; Salama, Aly E. ; Khalil, Ahmed H.
Author_Institution :
Dept. of Electron., German Univ. in Cairo
Abstract :
Hardware implementation of data compression algorithms is receiving increasing attention due to exponentially expanding network traffic and digital data storage usage. Among lossless data compression algorithms for hardware implementation, Lempel-Ziv algorithm is one of the most widely used. The main objective of this paper is to enhance the efficiency of systolic-array approach for implementation of Lempel-Ziv algorithm. The proposed implementation is area and speed efficient. The compression rate is increased by more than 40% and the design area is decreased by more than 30%. The effect of the selected buffer´s size on the compression ratio is analyzed. An FPGA implementation of the proposed design is carried out. It verifies that data can be compressed and decompressed on-the-fly.
Keywords :
data compression; field programmable gate arrays; systolic arrays; FPGA-based systolic array; LZ data compression; Lempel-Ziv algorithm; compression rate; hardware implementation; CADCAM; Compression algorithms; Computer aided manufacturing; Computer architecture; Data compression; Dictionaries; Electronic mail; Field programmable gate arrays; Hardware; Systolic arrays; CAM; FPGA; LZ77; LZ78 LZSS; LZW; data compression; systolic array;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378644
