A compact model for projections of future power supply distribution network requirements

Author

Joyner, James W. ; Meindl, James D.

Author_Institution

Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2002

fDate

25-28 Sept. 2002

Firstpage

376

Lastpage

380

Abstract

A closed-form worst-case IR drop model is developed to enable projections of the wiring resource requirements of the power supply distribution networks of future microprocessors and ASICs. The model is then used to highlight the design trade-off between I/O requirements and global wiring area needed for power distribution across three generations. For the 2013 technology generation, the global wiring resources exceed 40% of the available if fewer than 10,000 I/Os are utilized for power and ground.

Keywords

application specific integrated circuits; circuit CAD; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; microprocessor chips; power supply circuits; ASIC; I/O requirements; closed-form worst-case IR drop model; design trade-off; global wiring area; global wiring resources; microprocessors; power supply distribution network requirements model; technology generation; wiring resource requirements projections; Computational modeling; Costs; Electronic mail; Integrated circuit modeling; Integrated circuit technology; Microprocessors; Power generation; Power supplies; Voltage; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2002. 15th Annual IEEE International

Print_ISBN

0-7803-7494-0

Type

conf

DOI

10.1109/ASIC.2002.1158088

Filename

1158088