Low power bus encoding with crosstalk delay elimination [SoC]

In deep-submicron (DSM) technology, minimizing the propagation delay and power consumption on buses are two of the most important design objectives in system-on-chip (SoC) design. In particular, coupling effects between wires on the bus cause serious problems such as crosstalk delay, noise, and power consumption. Most of the previous works on bus encoding are targeted either (1) to minimize the power consumption on the bus or (2) to minimize the crosstalk delay, but not both. In this paper, we propose a new bus encoding algorithm which not only minimizes the dynamic power consumption on the bus but also eliminates the crosstalk delay. We achieve the combined objective of (1) and (2) by analyzing, formulating and solving the problem of minimizing a weighted sum of the self transition and cross-coupled transition activities on bus in the context of the concept of self-shield encoding (whose fundamental theory is well studied recently by B. Victor and K. Keutzer (Proc. ICCAD, 2001)). From experiments using a set of benchmark designs, it is shown that the proposed encoding technique consumes 15.4%-47.4% less power over the existing techniques, while totally eliminating the crosstalk delays.