Title :
A Hold Friendly Flip-Flop For Area Recovery
Author_Institution :
Adv. Micro Devices Inc, Toronto, Ont.
Abstract :
In this paper a new family of scan flip-flops is introduced whose scan pin hold characteristic has improved while data pin timing is left intact. This characteristic helps to alleviate scan chain hold problem while meeting the maximum frequency in data path. This solution can reduce the number of buffers inserted in the scan chain to fix hold violations. The new flip-flop can save up to 29% area as compared to the usage of normal flip-flop combined with hold-fixing buffers.
Keywords :
buffer circuits; flip-flops; area recovery; buffers; data pin timing; hold friendly flip-flop; scan chain; scan flip-flops; scan pin hold characteristic; Application specific integrated circuits; Circuit testing; Clocks; Digital integrated circuits; Energy consumption; Flip-flops; Frequency; Logic testing; Pipelines; Timing;
Conference_Titel :
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-0920-9
Electronic_ISBN :
1-4244-0921-7
DOI :
10.1109/ISCAS.2007.378781
